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[VHDL-FPGA-Verilog] SDRAM-Verilog-HDL

Description: SDRAM控制器Verilog HDL-source-code.rar-SDRAM-controller-Verilog HDL-source-code.rar
Platform: | Size: 719872 | Author: 小单 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: verilog语言对SDRAM读写时序的描述，采用状态机结构实现的读写功能-timing of the SDRAM read and write verilog language description, a state machine structure to achieve read and write capabilities
Platform: | Size: 3072 | Author: | Hits:

[VHDL-FPGA-Verilog] DDR-SDRAM_IP_core

Description: DDR-SDRAM接口模块verilog源代码，可用作IP核使用，已在FPGA上验证-DDR-SDRAM interface module verilog source code, can be used as IP cores to use, proven
Platform: | Size: 474112 | Author: zyy | Hits:

[VHDL-FPGA-Verilog] SDR_SDRAM_IP

Description: SDR SDRAM 控制器，Altera官网重要资料。内涵说明文档，和VHDL与Verilog两种设计IP。-SDR SDRAM controller from Altera
Platform: | Size: 2360320 | Author: peteryu010 | Hits:

[VHDL-FPGA-Verilog] sdram_control

Description: FPGA 用verilog控制sdram读写-FPGA control with verilog sdram read and write
Platform: | Size: 3486720 | Author: 扬州 | Hits:

[VHDL-FPGA-Verilog] Sdram_Control_4Port

Description: 用verilog写的sdram的控制，进行sdram的读取和写入操作- sdram with the controllor based on verilog
Platform: | Size: 358400 | Author: 钱军 | Hits:

[VHDL-FPGA-Verilog] 4port-sdram

Description: 4端口SDRAM控制器verilog程序-4-port SDRAM controller with verilog
Platform: | Size: 28672 | Author: xin | Hits:

[VHDL-FPGA-Verilog] UART_DMA

Description: 基于DE1的nios的串口sdram通信例程-Based on DE1' s nios serial communication routines sdram
Platform: | Size: 11353088 | Author: 李 | Hits:

[VHDL-FPGA-Verilog] sdram

Description: 在ISE环境中，利用verilog语言编写的SDRAM的控制，已经通过功能仿真，其中PLL部分并没有加入，使用时可以自行加入PLL模块。-Verilog language in the ISE environment, the use of SDRAM control, through functional simulation, which the PLL part and did not join, can join the PLL blocks.
Platform: | Size: 18432 | Author: 蔡青青 | Hits:

[VHDL-FPGA-Verilog] sdram_mdl

Description: verilog实现SDRAM控制器，quartus工程-verilog SDRAM controller, quartus project
Platform: | Size: 2287616 | Author: 唐华 | Hits:

[Other] sdram-ctrl

Description: FPGA sdram 全页模式控制，用verilog语言写的，非常的精简，控制方便-FPGA sdram full-page mode control, written in verilog language is compact, easy to control
Platform: | Size: 6144 | Author: 方道门 | Hits:

[Windows Develop] DDR-SDRAM

Description: ddr sdram 控制器的源代码，内有vhdl和verilog。-DDR SDRAM controller
Platform: | Size: 903168 | Author: 何海山 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 在nios环境下，结合verilog语言开发，功能是往SDRAM里面写0-99并打印出来-Nios environment, combined with the verilog language development function is to write to the SDRAM inside 0-99 and print out
Platform: | Size: 16943104 | Author: zq | Hits:

[VHDL-FPGA-Verilog] sdram

Description: sdram控制器的Verilog描述 测试可用-the sdram controller Verilog description of test available
Platform: | Size: 8192 | Author: 刘备 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: SDRAM的verilog程序，很好地程序，希望大家支持-SDRAM verilog program, a good program, I hope you will support
Platform: | Size: 1613824 | Author: 杨静 | Hits:

[VHDL-FPGA-Verilog] ddr-sdram

Description: It is complete document for DDR SD RAM program in verilog hdl
Platform: | Size: 897024 | Author: srikanth | Hits:

[VHDL-FPGA-Verilog] dab1814114c3

Description: 此為採用ALTERA所做的DDR 控制器(verilog)- File/Directory Description ============================================================================= \doc DDR SDRAM reference design documentation \model Contains the verilog SDRAM model \route Contains the Quartus 2000.05 project files a routed controller design \simulation Contains the verilog testbench, modelsim project file, and library \source Contains the verilog source files for the DDR SDRAM reference design \synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design
Platform: | Size: 880640 | Author: 李志偉 | Hits:

[VHDL-FPGA-Verilog] DDR-SDRAM-controller-verilog-code

Description: DDR SDRAM控制器verilog代码及中文说明文档-DDR SDRAM controller verilog code and documentation
Platform: | Size: 488448 | Author: 一样 | Hits:

[VHDL-FPGA-Verilog] verilog

Description: it is xilinx SDR SDRAM controller core
Platform: | Size: 297984 | Author: roger1 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 用Verilog HDL语言编写的SDRAM控制器，在DE2-70的开发板上实现。-SDRAM Controller with Verilog HDL language, DE2-70 development board.
Platform: | Size: 154624 | Author: 李桐 | Hits:
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